After work last night, I needed a break from staring at the computer screen. I mean, it was really getting to me. So, I decided to re-organize my capacitors and resistors into labeled bins, which is far better than what I had before.
I got a new order in, recently, of caps and resistors, and got a few shelves / cases to organize them with a while back. So, I just took that project on, labeled it and stuff. It was nice to work with physical objects for a while instead of being “jacked in” to the system. So, there ya go. I got an awesome system going that will serve me well in the future. And, I’m fully stocked and ready, now.
I’m not sure why I’m getting harmonics, though – maybe the crudeness of my sampling? I’ll continue to work with it… And, here’s some noise…
Yeah, so, I have a few ideas. I can throw away (and not compute) some frequencies that I don’t need. That’s also an advantage of writing a custom solution – that I can optimize for my own ends. I can “make” it logarithmic from within the algorithm, skipping over the non-interpolated values. How that’ll map to the butterflies and FFT?? – you got me! I don’t know. That’s the work left to do.
Let’s say that I want 30Hz on the far left, with another 60Hz bin next to it (and 10 more bands up to 14k on the right, logarithmically up), I’ll have to (at least) bump my number of samples per window up to 1024 (whew – a lot for an embedded system!). But, I bet I can get that down to at most 256 by skipping bins. The runtime overhead would of course be the comparisons (compute->don’t compute) and the memory of the key indices. That’s my first idea. I’ll try it and see if I don’t come up with something better as I move further along, who knows. [This is fun 🙂 ]
Oh well, that’s something I’m thinking about. Onwards we go.